A memory device includes: an array of memory cells (which are programmable) and a corresponding array of reference memory cells (‘memory_bar cells’); a sense amplifier; first and second branched lines connected to corresponding first and second input terminals of the sense amplifier; and an arrangement of bit lines and bit_bar lines which are controllable to selectively connect one of the memory cells and a corresponding one of the memory_bar cells to the first and second branched lines.
A read operation of the sense amplifier includes three modes (as listed in the order of occurrence): a precharge mode; an evaluation mode; and a discharge mode. In the precharge mode, the first and second branched lines are precharged by the sense amplifier. In the discharge mode, the first and second branched lines and a selected one of the bit lines and a corresponding selected one of the bit_bar lines are connected (and thus discharged) to ground. Of the total energy consumed by the sense amplifier, a large portion is attributable to the read operation.